The present invention relates to the field of microprocessor transient interrupt systems, and more particularly to an engine control system which utilizes a microprocessor transient interrupt system.
Many known engine control systems utilize a microprocessor to provide engine control output signals in response to the receipt of engine parameter input signals which typically include a signal related to engine throttle position. Typically, the engine control output signals are utilized to determine the amount of fuel and air delivered to engine cylinders of an internal combustion engine as well as determining the proper occurrence of engine spark and dwell with respect to proper rotational positions of the engine crankshaft. Such systems typically recognize that it is necessary to rapidly determine the existence of an acceleration transient condition and, in response thereto, appropriately modify the engine output control signals. To accomplish this, some prior systems have utilized an acceleration transient detector circuit external to the microprocessor to determine the existence of an acceleration condition and provide an interrupt signal to the microprocessor so as to implement providing modified engine control output signals during an acceleration condition. Preferably an external transient detector circuit is utilized to provide an acceleration interrupt signal in order to normally allow the microprocessor time to implement various other control functions during non-acceleration. Otherwise the microprocessor itself would have to substantially constantly monitor an input signal and determine if the instantaneous rate of change of the input signal exceeded a predetermined threshold rate thus indicating an acceleration transient condition. Also external transient detectors can provide for more rapidly detecting a transient condition and providing an interrupt in response thereto, since typically a microprocessor would only periodically monitor an external condition and perform calculations to determine the existence of a transient condition.
In engine microprocessor control systems such as those described above, additional external circuitry would have to be utilized if the microprocessor interrupt control is level rather than edge sensitive. This is because if the microprocessor is level sensitive, the external transient detector must be designed such that it will not continuously provide for interrupting the microprocessor during the entire transient condition. This additional external circuitry must therefore provide a short duration pulse in response to the existence of an acceleration transient which may exist over a substantial time period. An alternative is to use a microprocessor which is edge sensitive rather than level sensitive. The end result is that either the design of the microprocessor engine control system is limited in the choice of available microprocessors or additional external circuitry must be provided at an additional cost.
In addition to the above noted disadvantage, typically prior microprocessor engine control systems which are interrupted in response to an acceleration condition determined by an external transient detector circuit are either subject to error in misinterpreting a long transient which may have a discontinuity therein as two separate transients or these systems would require substantial external additional circuitry so as to compensate the external transient detector for this type of condition. Thus prior engine control systems were either susceptible to misinterpreting a long transient having a discontinuity therein as two separate transients, or they would require substantial additional costly and complex external circuitry in order to prevent this occurrence.
While the above noted problems are discussed with respect to engine control microprocessor transient interrupt systems, the same general disadvantages apply to all prior microprocessor transient interrupt systems which utilize an external transient detector.